DM3730 C64x+ DSP L1/L2 Memory Architecture:
- 32K-Byte L1P Program RAM/Cache (Direct Mapped)
- 80K-Byte L1D Data RAM/Cache (2-Way Set- Associative)
- 64K-Byte L2 Unified Mapped RAM/Cache (4- Way Set-Associative)
- 32K-Byte L2 Shared SRAM and 16K-Byte L2 ROM
Address Range | Size | Description |
---|---|---|
0x10F10000 - 0x10F17FFF | 32 KB | CACHE_L1D |
0x10E00000 - 0x10E07FFF | 32 KB | CACHE_L1P |
0x10800000 - 0x1080FFFF | 64 KB | CACHE_L2 |
0x10F04000 - 0x10F0FFFF | 48 KB | L1DSRAM |
0x107F8000 - 0x107FFFFF | 32 KB | IRAM - L2 RAM |
0x48000000 - 0x48FFFFFF | 16 MB | L4CORE: L4-Core Interconnect Address Space |
0x49000000 - 0x490FFFFF | 1 MB | L4PER: L4-Peripheral Interconnect Address Space |
Address Range | Size | Description |
---|---|---|
0x80000000 - 0x84FFFFFF | 80 MB | Linux |
0x85000000 - 0x85FFFFFF | 16 MB | CMEM |
0x86000000 - 0x877FFFFF | 24 MB | DDRALGHEAP |
0x87800000 - 0x87DFFFFF | 6 MB | DDR2 (BIOS, Codecs, Applications) |
0x87E00000 - 0x87EFFFFF | 1 MB | DSPLINK (MEM) |
0x87F00000 - 0x87F00FFF | 4 KB | DSPLINK (RESET) |
0x87F01000 - 0x87FFFFFF | 1020 KB | unused |
1 comment:
Excellent pieces. Keep posting such kind of information on your blog. I really impressed by your blog.
Vee Eee Technologies
Post a Comment