Externally, the FSM is defined by its primary inputs, outputs and the clock signal. The clock signal determines when the inputs are sampled and outputs get their new values. Internally, it means, that machine stores a state which is updated at each tick of the clock. There are two major types of FSM. If the primary outputs depend on the current state only, then it's a Moore machine.
If the primary outputs are a function of both the primary inputs and the current state, it is known as Mealy machine.
This paper gives an example for FSM with VHDL, in which ISE is used for viewing wave forms.
The following gives example for FSM with bluespec.
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