- TI Multicore Programming Guide
- TI DaVinci and OMAP Multi-core System Cache Management; Very good guidance for DM6467 / DM8168 and OMAP system.
- Multicore Resource Management
- Achieving Predictable Performance with On-Chip Shared L2 Caches for Manycore-Based Real-Time Systems
- Operating System-Level On-Chip Resource Management in The Multicore Era
- Dynamic Cache Contention Detection in Multi-threaded Applications
Thursday, December 1, 2011
Multi-core System Programming and Cache Management
In a multi-core system, resource and cache management is very important since potential resource and cache contention may cause unexpected behaviors such as crashes and performance degradation. The following links provide good references:
- ► 2013 (35)
- ► 2012 (99)
- TI Davinci Audio Source Codes
- x265 Development - An Open Source HEVC / H.265
- DM6467 PCI Interrupt Handling
- DM6467T ARM/DSP EDMA Channel Synchronization Event...
- DMA channels used by DM6467 ARM and DSP
- HEVC / H.265 Specification Working Draft 5 (WD5) a...
- Java Exception in thread "main" java.lang.NoClassD...
- DM6467 PCI Source Codes
- Analysis of Coding Tools in HEVC Test Model (HM 1....
- H.265 Development - thevc Tiny HEVC Baseline code...
- Installing and Configuring SVNServe and TortoiseSV...
- DM6467 ARM EDMA Configuration
- Multi-core System Programming and Cache Management...
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- ► 2010 (99)
- ► 2009 (66)