Saturday, August 29, 2009

Synfora Pico Extreme FPGA


Design teams are under growing pressure to create faster, cheaper, better products. Finding the most efficient implementation of complex algorithms in silicon is critical to success, but can be time-consuming and expensive. Algorithmic synthesis allows design teams to work at higher levels of abstraction, decreasing the time, cost and risk of designing a complex FPGA.

Synfora’s PICO platform offers the most advanced algorithmic synthesis technology for FPGA design. PICO algorithmic synthesis enables the implementation of large and complex algorithms while achieving unprecedented results.

Application Engines Define and Differentiate an FPGA
An FPGA comprises, at the highest level, four different types of IP:

  • Complex application engines (hardware, e.g. video codecs, wireless modems)
  • Embedded Processors
  • Connectivity and Control IP (USB, DMA)
  • Memory

Only the application engine defines and differentiates the FPGA’s functionality. An application engine is an efficient implementation of the algorithm that meets the PPA (Power, Performance, Area) targets. It also provides standard interfaces (streaming data, local memory and bus interface) to ensure easy integration into the FPGA. The application engine is critical for differentiating the end product. It can change rapidly, and the bulk of engineering effort is spent on its implementation. Algorithmic synthesis makes the design process dramatically quicker at a lower cost by creating hardware application engines that “drop” into the rest of the FPGA.

An FPGA comprises application engines (video CODEC, wireless MODEM), embedded processor, connectivity and control IP and memory. It is the application engines that define and differentiate the end product

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About the PICO platform
The PICO platform comprises tools and IP, built around an advanced compiler technology based on over a decade of research at HP Labs. The compiler finds and exploits parallelism at multiple levels and then creates efficient hardware to meet the chosen performance target.

PICO Algorithmic Synthesis creates efficient hardware from an untimed C algorithm for large, complex subsystems

PICO Extreme FPGA brings all the benefits of PICO Express FPGA but also introduces TCABs, a major technological innovation. TCABs enable a recursive system composition (building blocks within building blocks) that allows more intuitive coding, better results and faster runtimes. PICO Extreme algorithmic synthesis enables the implementation of dramatically larger and more complex sub-systems.


  • Reduced area: TCABs give you the ability to efficiently share hardware
  • Multiplexing: TCABs can be automatically time multiplex hardware to better utilize FPGA fabric and reduce cost
  • Define key properties: TCABs allow you to lock down key properties of the hardware e.g. latency
  • Re-usable IP: TCABs allow you to build re-usable code blocks that have known-good hardware characteristics
  • Reduced runtime: TCABs reduce design time and facilitate the process for inexperienced users
  • Seamless path: one language from algorithmic C

TCABs enable a recursive system composition (building blocks within building blocks) for dramatically larger systems with unprecedented Quality of Results

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