Wednesday, September 22, 2010

VSofts H.264 Encoder on Virtex-6

Xilinx and VSofts Demonstrate Low Latency Real-Time H.264/AVC-I IP Core Compression Solution for Xilinx FPGAs
Xilinx and VSofts Show Broadcast Equipment Designers How New Real-Time Encoding Technology Meets Highest Video Quality Expectations at IBC 2010

AMSTERDAM, Sept 10, 2010 /PRNewswire via COMTEX/ --

Xilinx(R), Inc. (Nasdaq: XLNX) and Vanguard Software Solutions, Inc. (VSofts) today demonstrated at the IBC2010 conference the ability of VSofts' H.264/AVC-I IP core to deliver a very low latency, ITU (International Telecommunication Union) and Panasonic AVC-Intra compliant Field Programmable Gate Array (FPGA) implementation of the industry-standard codec for providing minimal delay from source to encoded video in real-time video broadcast applications.

"The technology of video capture and broadcast is moving very rapidly," said Felix Nemirovsky, VSofts' Vice President of Marketing. "When it comes to High Value Content acquisition, editing and archiving, the flexibility and high data rate, real-time performance offered by basing our AVC I-frames encoder on Xilinx's proven and market-leading FPGAs allows us to meet the demands of a rapidly evolving marketplace."

As the demands of video capture and display move toward 3D TV and 4Kx2K Digital Cinema, FPGAs give designers flexibility during the design cycle and into production as standards evolve, while providing the levels of performance required for driving real-time video. Each evolution from 1080i through 4Kx2K formats requires an 8X increase of throughput off the back of the camera from 1.5Gbps to 12Gbps. This creates a potential chokepoint at each stage of the broadcast chain from camera, to contribution encoders passing video from professional studios, to video servers and to post-production houses. The H.264/AVC Intra IP core relies on the inherent flexibility, parallel processing and high-speed connectivity capabilities of Xilinx's Virtex(R)-6 FPGA to overcome these chokepoints by significantly reducing the encoding delay from camera acquisition through to live broadcast.

"The broadcast industry's evolution is moving faster than custom or standard off-the-shelf system-on-chip solutions can support in terms of performance, flexibility and time-to-market," said Dean Westman, vice president, Communications Business at Xilinx. "VSofts' H.264/AVC Intra encoding solutions underscores the value of IP in Xilinx's Targeted Design Platform approach for meeting the performance and development needs of broadcast equipment developers."

Xilinx Broadcast Targeted Design Platforms

Once in production at the end of the year, VSofts' H.264/AVC Intra IP core will join Xilinx's portfolio of Encoding IP that make up Xilinx's design platforms for the broadcast industry. This IP core can be used in conjunction with the Xilinx Broadcast Processing and Xilinx Broadcast Connectivity Kits, which integrate key hardware and software elements needed to quickly build systems and fully verify performance for a broad range of video and audio applications. These platforms include connectivity and video processing IP blocks, design environments and reference designs, along with a base set of digital audio/video development boards and industry standard FPGA Mezzanine Cards (FMC).

For broadcast applications, the Targeted Design Platform approach simplifies the development of complete broadcast audio and video interface solutions, including triple rate SDI solutions with support for standard definition TV to 3DTV and beyond in a single programmable device. It also enables the earliest possible adoption of emerging standards, such as the DisplayPort, rapidly replacing DVI (Digital Visual Interface), and new Ethernet AVB (Audio Video Bridging) technology that guarantees timing and bandwidth availability in IP networks. For more, please visit

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