Thursday, January 1, 2009


In the blog "FPGA-to-ASIC Conversion Flow", a conversion from FPAG to ASIC was discussed. The article of Jeff Kriegbaum from Arrow Electronics Components also mentioned "It could also make sense to convert an FPGA to ASIC directly, which lowers NRE a small amount from the rapid type" in

A comparison between FPGA and ASIC was given by Kuon and Rose in 2006

It also
presented empirical measurements quantifying the gap between FPGAs and ASICs. It was observed that for circuits implemented entirely using LUTs and flip-flops (logic-only), an FPGA is on average 40 times larger and 3.2 times slower than a standard cell implementation. An FPGA also consumes 12 times more dynamic power than an equivalent ASIC on average. It was confirmed that the use of hard multipliers and dedicated memories enable a substantial reduction in area and power consumption but these blocks have a relatively minor impact on the delay differences between ASICs and FPGAs.

A good discussion about difference of FPGA vs ASIC can be found at

where also gave some useful links:

1 comment:

Cynthia Madufor said...

thanks for the information, very useful..especially for my thesis in my university, university of Nigeria..visit this site for more information,, or


Blog Archive

About Me

My photo
HD Multimedia Technology player